The present invention relates to metal-oxide-semiconductor field-effect transistors (MOSFET), and more specifically, to forming metal resistors.
The MOSFET is a transistor used for amplifying or switching electronic signals. The MOSFET has a source, a drain, and a metal oxide gate electrode. The metal gate is electrically insulated from the main semiconductor n-channel or p-channel by a thin layer of insulating material, for example, silicon dioxide or glass, which makes the input resistance of the MOSFET relatively high. The gate voltage controls whether the path from drain to source is an open circuit (“off”) or a resistive path (“on”).
N-type field effect transistors (NFET) and p-type field effect transistors (PFET) are two types of complementary MOSFETs. The NFET uses electrons as the current carriers and is built with n-doped source and drain junctions. The PFET uses holes as the current carriers and is built with p-doped source and drain junctions.
The fin-type field effect transistor (FinFET) is a type of MOSFET. The FinFET contains a conformal gate around the fin that mitigates the effects of short channels and reduces drain-induced barrier lowering. The “fin” refers to the narrow channel between source and drain regions. Often, a thin insulating high-k gate oxide layer around the fin separates the fin channel from the gate metal.
The evolution of modern complementary metal-oxide semiconductor (CMOS) technology continuously scales down not only the device channel length but also the contact length and resistor scale. As such, typical processes for forming metal resistors suffer from scaling problems at reduced scale. For example, conventional methods of forming metal resistors (RM) typically include forming planar metal resistors patterned using middle of line (MOL) processes. These MOL processes suffer at reduced scale at least because MOL processes can result in metal transistors having topography that causes complexity for subsequent patterning and etching processes.